how to write a makefile for c program multiple files

$(CC) $(LDFLAGS) $(OBJS) -o $(LOADLIBES) $(LDLIBS) $(MKDIR_P) $(dir $(CPPFLAGS) $(CXXFLAGS) -c $< -o cleanĪlso, if you don’t care about out-of-source builds, you can use this even simpler Makefile, which takes advantage of the built-in implicit rules: $(MKDIR_P) $(dir $(CPPFLAGS) $(CFLAGS) -c $< -o c++ source $(MKDIR_P) $(dir $(ASFLAGS) -c $< -o c source INC_DIRS := $(shell find $(SRC_DIRS) -type d) SRCS := $(shell find $(SRC_DIRS) -name *.cpp -or -name *.c -or -name *.s) Here is a simple Makefile that will do all these things and works with C, C++, and assembly: Automatic generation of include directory flags.Automatic determination of list of object/source files.Automatic (and accurate!) header dependencies.

Out-of-source builds (object files get dumped in a separate directory from the source).Until recently, there were four things I wanted my build system to do for me that I hadn’t figured out how to do in Make: I’ve used Make for a lot for small projects, but for larger ones, it was just too tedious.

How to write a makefile for c program multiple files